1. Field
Example embodiments relate to a package substrate, a semiconductor package having the package substrate, and a method of manufacturing the semiconductor package. More particularly, example embodiments relate to a package substrate used for packaging a semiconductor chip, a semiconductor package having the package substrate, and a method of manufacturing the semiconductor package.
2. Description of the Related Art
Generally, a plurality of semiconductor fabrication processes may be performed on a semiconductor substrate to form a plurality of semiconductor chips. In order to mount the semiconductor chips on a printed circuit board (PCB), a packaging process may be performed on the semiconductor chips to form semiconductor packages.
The packaging process may include mounting the semiconductor chip on a package substrate, electrically connecting the semiconductor chip with the package substrate, molding the package substrate and the semiconductor chip, mounting external terminals on the package substrate, cutting the package substrate to singulate semiconductor packages, and testing electrical connections and operations of the semiconductor package.
The conventional package substrate may include circuit patterns having an anode terminal and a cathode terminal. The anode terminal and the cathode terminal may be electrically connected with each other. Thus, it may be possible to test the electrical connections and the operations of the semiconductor package, after cutting a line between the anode terminal and the cathode terminal.
That is, it may be possible to perform the test process after completing the semiconductor package. Therefore, a semiconductor package determined to be abnormal may be scrapped. As a result, a yield of the semiconductor package manufactured by the conventional packaging process may be considerably low.